Xiaoning Huang received her B.Eng. degree in Electrical Engineering from Hangzhou Dianzi University (HDU), China, in 2022. She then pursued the M.Sc. degree in Electrical Engineering at KU Leuven, Belgium, with a specialization in Electronics and Chip Design, and graduated with Cum Laude honors in 2024.

During her master’s study, she conducted her thesis research at IMEC, focusing on noise cancellation and bandwidth extension techniques for nanopore readout circuits. Solid-state nanopore technology enables high-throughput DNA and protein sequencing but requires transimpedance amplifiers (TIAs) with both low noise and wide bandwidth. In her thesis, she explored the feasibility of applying noise cancellation and bandwidth extension techniques originally developed for optical I/O circuits to nanopore readout systems.

Since 2024, she has been working as a Junior Analog Design Engineer at Cyient (formerly AnSem), where she participates in the design of several analog building blocks, including PMU units, clock generators, temperature sensors, and ADC input buffers.

Her research interests include analog integrated circuit design, low-noise circuits, transimpedance amplifiers, nanopore front-end circuits, and biosignal readout circuits.